FIG. 1 shows the schematic of a prior art array of pixels 210. Each pixel 210 has one photodiode 205. Charge collected by the photodiode 205 is transferred to a floating diffusion 204 by the transistor 203. Transistor 203 transfers charge to the floating diffusion 204 when the control gate signal of the transfer gate is activated. All the transfer gate control gates of transistors 203 are connected together within each row of pixels 210. Transistor 202 buffers the voltage between the floating diffusion 204 and the output column signal wire. Some variations of the pixel 210 will have a row select transistor (not shown) between the transistor 202 and the column output wire. A row select transistor may also be placed between transistor 202 and the power supply (or some other voltage source) wire. A reset transistor 200 is used to reset the floating diffusion 204 to the power supply voltage. All of the reset transistor 200 gates are connected together within each row of pixels 210.
Summing together photogenerated charge between pixels can change the resolution of the pixel array. Activating transistors 206 that connect adjacent floating diffusions 204 across a row sums together the charge stored on the floating diffusions 204. Activating the vertical summing transistors 207 sums the charge along the columns.
The summing of charge is desirable when the pixel array needs to be read out at a higher frame rate for video applications. It also effectively creates a larger pixel for better light sensitivity. U.S. Pat. No. 7,071,980 and U.S. Patent Application US2006/0274176 are examples of pixel summing using circuits similar to FIG. 1. This method of charge summing is not optimum because the summing transistors 206 and 207 are connected directly to the floating diffusions 204. These extra transistors add capacitance to the floating diffusions 204. The voltage change, V, on the floating diffusion 204 is given by the equation V=Q/C where Q is the amount of charge, and C is the floating diffusion 204 capacitance. The increased capacitance C of the floating diffusion 204 caused by the summing transistors 206 and 207 causes a smaller voltage change, V. A smaller voltage change means is will be harder to detect small amounts of photogenerated charge than if there were no summing transistors present.
U.S. Pat. Nos. 6,452,153 and 6,878,918 avoid the problem of summing transistors that causes increased floating diffusion capacitance. FIG. 2 shows a schematic demonstrating the prior art.
Each pixel 310 has one photodiode 305. Charge collected by the photodiode 305 is transferred to a floating diffusion 304 by the transistor 303. Transistor 303 transfers charge to the floating diffusion 304 when the transfer gate control gate signal is activated. All the transfer gate control gates of transistors 303 are connected together within each row of pixels 310. Transistor 302 buffers the voltage between the floating diffusion 304 and the output column signal wire. Some variations of the pixel 310 will have a row select transistor (not shown) between the transistor 302 and the column output wire. A row select transistor may also be placed between transistor 302 and the power supply wire (or some other voltage source). Reset transistor 300 is used to reset the floating diffusion 304 to the power supply voltage. All of the reset transistor 300 gates are connected together within each row of pixels 310.
There are horizontal summing transistors 306 and vertical summing transistors 307 that when activated, cause charge to be shared between the photodiodes 305. Because the summing transistors 306 and 307 are connected to the photodiodes 205 and not the floating diffusions 304, the floating diffusion 304 capacitances are not increased.
This disadvantage of this approach to charge summing is that it is very difficult to transfer all charge out of the photodiodes when the summing transistors are turned on. Incomplete charge transfer results in poor signal linearity response and image defects.
U.S. Pat. No. 6,914,227 solves the previously mentioned problems by inserting a second amplifier into each pixel to isolate summing transistors from the floating diffusions. However, the extra amplifier adds extra noise to the signal.
The present invention discovered that it is desirable to sum together photogenerated charges in a pixel with the minimum possible floating diffusion capacitance and minimum possible amplifier signal noise. The present invention described herein will also address the deficiencies of the prior art.